A number of approaches are currently available for analyzing high frequency transient input signals. One approach is to use a ramp generator. The input signal is used to trigger a ramp generator which generates a ramp of a known dv/dt. By sampling the voltage on the ramp at some later time, a calculation can be made to determine how much time has passed since the ramp was triggered. Particularly, by utilizing a well controlled current source, and a known capacitance, the equation ic=dv/dt can be used to provide timing information on the signal.
Flip flops may also be used to analyze high speed transient signals. In this method, a clock signal goes into the clock input of a D flip flop while the input signal goes into the data input of the flip flop. The flip flops are placed along a transmission line, so that the data will sequentially show up in the flip flops. Consequently, clocking signals take a flash view of the incoming signal. Signal characteristics can be derived from this information.
Another approach to analyzing high frequency input signals is steady state mixing with a clock or local oscillator signal. This function is similar to a phase detector in a phase locked loop. This technique only works for periodic signals.
Each of these prior art approaches has one or more disadvantages associated with it. Flip flops are inherently slow, thus they do not represent a practical tool for analyzing high speed signals. Utilization of a ramp generator is also problematic because it is necessary to trigger the ramp generator and then read its output in a sequential fashion. Thus, ramp generators are also slow.
Current high frequency input signal analysis devices are made in silicon and are either lumped circuits or hybrid tapped delay lines. The lumped circuits have limited throughput because the output is serial, while the hybrid approach has limited resolution because of large parasitic effects due to connections from the chip and the external transmission line. In addition, since silicon is a conductive substrate, signal losses along an integrated silicon transmission line make the development of an integrated silicon tapped line delay structure difficult. Consequently, present transient phase detector devices are limited to about 10 ps resolution with a throughput of approximately 100 KHz for oscilloscopes and 200 ps at 20 MHz for time interval measurement instruments.
There are current attempts to produce distributed monolithic silicon devices using active delay elements to achieve the effect of a tapped delay line. This approach is problematic given the non-uniformities and instabilities associated with active delay elements.